Date of Award
8-2009
Document Type
Thesis
Degree Name
Master of Science (MS)
Legacy Department
Electrical Engineering
Committee Chair/Advisor
Taha, Tarek
Committee Member
Birchfield , Stanley
Committee Member
Hoover , Adam
Abstract
There is a significant interest in the research community to develop large scale,
high performance implementations of neuromorphic models. These have the potential to
provide significantly stronger information processing capabilities than current computing
algorithms. This thesis examines the parallelization of two recent biologically inspired
hierarchical Bayesian cortical models onto recent multicore architectures. These models
have been developed recently based on new insights from neuroscience and have several
advantages over traditional neural networks. In particular, they need far fewer network
nodes to simulate a large scale cortical model than traditional neural networks, making
them computationally more efficient. This is the first study of the parallelization of this
class of models onto multicore processors. Results indicate that the models can take
advantage of parallelism present in the processors to provide significant speedups on
multicore architectures. These models are further shown to scale well on a cluster of 336
PS3s available at the Air Force Research Lab which is shown to emulate between 10E8 to
1010 neurons. In particular, the results indicate that a cluster of Playstation 3s can provide
an economical, yet powerful, platform for simulating large scale neuromorphic models.
Recommended Citation
Yalamanchili, Pavan, "HIERARCHICAL BAYESIAN CORTICAL MODELS: ANALYSIS AND ACCELERATION ON MULTICORE ARCHITECTURES" (2009). All Theses. 655.
https://tigerprints.clemson.edu/all_theses/655